DS1603+【PDF 3/9 页】IC COUNTER ELAPSED TIME 5V 7-SIP

DS1603

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DATA INPUT

Following the 8-bit protocol that inputs write mode, 32 bits of data are written to the selected counter on

the rising edge of the next 32 CLK cycles. After 32 bits have been entered any additional CLK cycles will

be ignored until RST is transitioned low to end data transfer and then high again to begin new data

transfer.

DATA OUTPUT

Following the eight CLK cycles that input read mode protocol, 32 bits of data will be output from the

selected counter on the next 32 CLK cycles. The first data bit to be transmitted from the selected 32-bit

counter occurs on the falling edge after the last bit of protocol is written. When transmitting data from the

selected 32-bit counter, RST must remain at high level as a transition to low level will terminate data

transfer. Data is driven out the DQ pin as long as CLK is low. When CLK is high the DQ pin is tristated.

OSCILLATOR OUTPUT

Pin 6 of the DS1603 module is a 1Hz output signal. This signal is present only when VCC is applied and

greater than the internal power supply. However, the output is guaranteed to meet TTL requirement only

while VCC is within normal limits. This output can be used as a 1-second interrupt or time tick needed in

some applications.

INTERNAL POWER

The internal battery of the DS1603 module provides 35mAh and will run the elapsed time counter for

over 10 years in the absence of power.

PIN DESCRIPTIONS

VCC, GND – DC power is provided to the device on these pins. VCC is the +5V input. When 5V is applied

within normal limits, the device is fully accessible and data can be written and read. When a 3V battery is

connected to the device and VCC is below 1.25 x VBAT, reads and writes are inhibited. As VCC falls below

VBAT the continuous counter is switched over to the internal battery.

CLK (Serial Clock Input) – CLK is used to synchronize data movement on the serial interface.

DQ (Data Input/Output) – The DQ pin is the bi-directional data pin for the 3-wire interface.

RST (Reset) – The reset signal must be asserted high during a read or a write.

OSC (One Hertz Output Signal) – This signal is only present when Vcc is at a valid level and the

oscillator is enabled.

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